Youssef Harmouch

Implemented an Inter-Core Communication (ICC) module to exchange data between two different cores, including End-to-End (E2E) verification of the transmitted data. Developed a sniffer module that captures data from the SPI bus (read on Core 0) and forwards it via the ICC module to Core 1, allowing Core 1 to obtain the same measurement as Core 0 in order to guarantee redundancy for safety. Implemented safety mechanisms for the analog front-end (AFE) ASIC in compliance with the safety manual specifications (AUTOSAR-compliant).

Implemented microcontroller and TI ASIC safety mechanisms in compliance with the safety manual specifications (AUTOSAR-compliant). Developed a reset manager module to handle system resets across all three cores of the microcontroller (AUTOSAR-compliant). Designed a scheduler to synchronize current, temperature, and cell voltage measurements, and implemented the cell-balancing algorithm (AUTOSAR-compliant). Developed Python scripts to post-process the final hex file (embedding CRC values, filling memory gaps with specified values, updating data at specific addresses, etc.).